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The C and C++ Include Header Files
cat -n /usr/include/drm/drm.h
1 /* 2 * Header for the Direct Rendering Manager 3 * 4 * Author: Rickard E. (Rik) Faith <faith@valinux.com> 5 * 6 * Acknowledgments: 7 * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic cmpxchg. 8 */ 9 10 /* 11 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. 12 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. 13 * All rights reserved. 14 * 15 * Permission is hereby granted, free of charge, to any person obtaining a 16 * copy of this software and associated documentation files (the "Software"), 17 * to deal in the Software without restriction, including without limitation 18 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 19 * and/or sell copies of the Software, and to permit persons to whom the 20 * Software is furnished to do so, subject to the following conditions: 21 * 22 * The above copyright notice and this permission notice (including the next 23 * paragraph) shall be included in all copies or substantial portions of the 24 * Software. 25 * 26 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 27 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 28 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 29 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 30 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 31 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 32 * OTHER DEALINGS IN THE SOFTWARE. 33 */ 34 35 #ifndef _DRM_H_ 36 #define _DRM_H_ 37 38 #if defined(__linux__) 39 40 #include <linux/types.h> 41 #include <asm/ioctl.h> 42 typedef unsigned int drm_handle_t; 43 44 #else /* One of the BSDs */ 45 46 #include <stdint.h> 47 #include <sys/ioccom.h> 48 #include <sys/types.h> 49 typedef int8_t __s8; 50 typedef uint8_t __u8; 51 typedef int16_t __s16; 52 typedef uint16_t __u16; 53 typedef int32_t __s32; 54 typedef uint32_t __u32; 55 typedef int64_t __s64; 56 typedef uint64_t __u64; 57 typedef size_t __kernel_size_t; 58 typedef unsigned long drm_handle_t; 59 60 #endif 61 62 #if defined(__cplusplus) 63 extern "C" { 64 #endif 65 66 #define DRM_NAME "drm" /**< Name in kernel, /dev, and /proc */ 67 #define DRM_MIN_ORDER 5 /**< At least 2^5 bytes = 32 bytes */ 68 #define DRM_MAX_ORDER 22 /**< Up to 2^22 bytes = 4MB */ 69 #define DRM_RAM_PERCENT 10 /**< How much system ram can we lock? */ 70 71 #define _DRM_LOCK_HELD 0x80000000U /**< Hardware lock is held */ 72 #define _DRM_LOCK_CONT 0x40000000U /**< Hardware lock is contended */ 73 #define _DRM_LOCK_IS_HELD(lock) ((lock) & _DRM_LOCK_HELD) 74 #define _DRM_LOCK_IS_CONT(lock) ((lock) & _DRM_LOCK_CONT) 75 #define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT)) 76 77 typedef unsigned int drm_context_t; 78 typedef unsigned int drm_drawable_t; 79 typedef unsigned int drm_magic_t; 80 81 /* 82 * Cliprect. 83 * 84 * \warning: If you change this structure, make sure you change 85 * XF86DRIClipRectRec in the server as well 86 * 87 * \note KW: Actually it's illegal to change either for 88 * backwards-compatibility reasons. 89 */ 90 struct drm_clip_rect { 91 unsigned short x1; 92 unsigned short y1; 93 unsigned short x2; 94 unsigned short y2; 95 }; 96 97 /* 98 * Drawable information. 99 */ 100 struct drm_drawable_info { 101 unsigned int num_rects; 102 struct drm_clip_rect *rects; 103 }; 104 105 /* 106 * Texture region, 107 */ 108 struct drm_tex_region { 109 unsigned char next; 110 unsigned char prev; 111 unsigned char in_use; 112 unsigned char padding; 113 unsigned int age; 114 }; 115 116 /* 117 * Hardware lock. 118 * 119 * The lock structure is a simple cache-line aligned integer. To avoid 120 * processor bus contention on a multiprocessor system, there should not be any 121 * other data stored in the same cache line. 122 */ 123 struct drm_hw_lock { 124 __volatile__ unsigned int lock; /**< lock variable */ 125 char padding[60]; /**< Pad to cache line */ 126 }; 127 128 /* 129 * DRM_IOCTL_VERSION ioctl argument type. 130 * 131 * \sa drmGetVersion(). 132 */ 133 struct drm_version { 134 int version_major; /**< Major version */ 135 int version_minor; /**< Minor version */ 136 int version_patchlevel; /**< Patch level */ 137 __kernel_size_t name_len; /**< Length of name buffer */ 138 char *name; /**< Name of driver */ 139 __kernel_size_t date_len; /**< Length of date buffer */ 140 char *date; /**< User-space buffer to hold date */ 141 __kernel_size_t desc_len; /**< Length of desc buffer */ 142 char *desc; /**< User-space buffer to hold desc */ 143 }; 144 145 /* 146 * DRM_IOCTL_GET_UNIQUE ioctl argument type. 147 * 148 * \sa drmGetBusid() and drmSetBusId(). 149 */ 150 struct drm_unique { 151 __kernel_size_t unique_len; /**< Length of unique */ 152 char *unique; /**< Unique name for driver instantiation */ 153 }; 154 155 struct drm_list { 156 int count; /**< Length of user-space structures */ 157 struct drm_version *version; 158 }; 159 160 struct drm_block { 161 int unused; 162 }; 163 164 /* 165 * DRM_IOCTL_CONTROL ioctl argument type. 166 * 167 * \sa drmCtlInstHandler() and drmCtlUninstHandler(). 168 */ 169 struct drm_control { 170 enum { 171 DRM_ADD_COMMAND, 172 DRM_RM_COMMAND, 173 DRM_INST_HANDLER, 174 DRM_UNINST_HANDLER 175 } func; 176 int irq; 177 }; 178 179 /* 180 * Type of memory to map. 181 */ 182 enum drm_map_type { 183 _DRM_FRAME_BUFFER = 0, /**< WC (no caching), no core dump */ 184 _DRM_REGISTERS = 1, /**< no caching, no core dump */ 185 _DRM_SHM = 2, /**< shared, cached */ 186 _DRM_AGP = 3, /**< AGP/GART */ 187 _DRM_SCATTER_GATHER = 4, /**< Scatter/gather memory for PCI DMA */ 188 _DRM_CONSISTENT = 5 /**< Consistent memory for PCI DMA */ 189 }; 190 191 /* 192 * Memory mapping flags. 193 */ 194 enum drm_map_flags { 195 _DRM_RESTRICTED = 0x01, /**< Cannot be mapped to user-virtual */ 196 _DRM_READ_ONLY = 0x02, 197 _DRM_LOCKED = 0x04, /**< shared, cached, locked */ 198 _DRM_KERNEL = 0x08, /**< kernel requires access */ 199 _DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */ 200 _DRM_CONTAINS_LOCK = 0x20, /**< SHM page that contains lock */ 201 _DRM_REMOVABLE = 0x40, /**< Removable mapping */ 202 _DRM_DRIVER = 0x80 /**< Managed by driver */ 203 }; 204 205 struct drm_ctx_priv_map { 206 unsigned int ctx_id; /**< Context requesting private mapping */ 207 void *handle; /**< Handle of map */ 208 }; 209 210 /* 211 * DRM_IOCTL_GET_MAP, DRM_IOCTL_ADD_MAP and DRM_IOCTL_RM_MAP ioctls 212 * argument type. 213 * 214 * \sa drmAddMap(). 215 */ 216 struct drm_map { 217 unsigned long offset; /**< Requested physical address (0 for SAREA)*/ 218 unsigned long size; /**< Requested physical size (bytes) */ 219 enum drm_map_type type; /**< Type of memory to map */ 220 enum drm_map_flags flags; /**< Flags */ 221 void *handle; /**< User-space: "Handle" to pass to mmap() */ 222 /**< Kernel-space: kernel-virtual address */ 223 int mtrr; /**< MTRR slot used */ 224 /* Private data */ 225 }; 226 227 /* 228 * DRM_IOCTL_GET_CLIENT ioctl argument type. 229 */ 230 struct drm_client { 231 int idx; /**< Which client desired? */ 232 int auth; /**< Is client authenticated? */ 233 unsigned long pid; /**< Process ID */ 234 unsigned long uid; /**< User ID */ 235 unsigned long magic; /**< Magic */ 236 unsigned long iocs; /**< Ioctl count */ 237 }; 238 239 enum drm_stat_type { 240 _DRM_STAT_LOCK, 241 _DRM_STAT_OPENS, 242 _DRM_STAT_CLOSES, 243 _DRM_STAT_IOCTLS, 244 _DRM_STAT_LOCKS, 245 _DRM_STAT_UNLOCKS, 246 _DRM_STAT_VALUE, /**< Generic value */ 247 _DRM_STAT_BYTE, /**< Generic byte counter (1024bytes/K) */ 248 _DRM_STAT_COUNT, /**< Generic non-byte counter (1000/k) */ 249 250 _DRM_STAT_IRQ, /**< IRQ */ 251 _DRM_STAT_PRIMARY, /**< Primary DMA bytes */ 252 _DRM_STAT_SECONDARY, /**< Secondary DMA bytes */ 253 _DRM_STAT_DMA, /**< DMA */ 254 _DRM_STAT_SPECIAL, /**< Special DMA (e.g., priority or polled) */ 255 _DRM_STAT_MISSED /**< Missed DMA opportunity */ 256 /* Add to the *END* of the list */ 257 }; 258 259 /* 260 * DRM_IOCTL_GET_STATS ioctl argument type. 261 */ 262 struct drm_stats { 263 unsigned long count; 264 struct { 265 unsigned long value; 266 enum drm_stat_type type; 267 } data[15]; 268 }; 269 270 /* 271 * Hardware locking flags. 272 */ 273 enum drm_lock_flags { 274 _DRM_LOCK_READY = 0x01, /**< Wait until hardware is ready for DMA */ 275 _DRM_LOCK_QUIESCENT = 0x02, /**< Wait until hardware quiescent */ 276 _DRM_LOCK_FLUSH = 0x04, /**< Flush this context's DMA queue first */ 277 _DRM_LOCK_FLUSH_ALL = 0x08, /**< Flush all DMA queues first */ 278 /* These *HALT* flags aren't supported yet 279 -- they will be used to support the 280 full-screen DGA-like mode. */ 281 _DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */ 282 _DRM_HALT_CUR_QUEUES = 0x20 /**< Halt all current queues */ 283 }; 284 285 /* 286 * DRM_IOCTL_LOCK, DRM_IOCTL_UNLOCK and DRM_IOCTL_FINISH ioctl argument type. 287 * 288 * \sa drmGetLock() and drmUnlock(). 289 */ 290 struct drm_lock { 291 int context; 292 enum drm_lock_flags flags; 293 }; 294 295 /* 296 * DMA flags 297 * 298 * \warning 299 * These values \e must match xf86drm.h. 300 * 301 * \sa drm_dma. 302 */ 303 enum drm_dma_flags { 304 /* Flags for DMA buffer dispatch */ 305 _DRM_DMA_BLOCK = 0x01, /**< 306 * Block until buffer dispatched. 307 * 308 * \note The buffer may not yet have 309 * been processed by the hardware -- 310 * getting a hardware lock with the 311 * hardware quiescent will ensure 312 * that the buffer has been 313 * processed. 314 */ 315 _DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */ 316 _DRM_DMA_PRIORITY = 0x04, /**< High priority dispatch */ 317 318 /* Flags for DMA buffer request */ 319 _DRM_DMA_WAIT = 0x10, /**< Wait for free buffers */ 320 _DRM_DMA_SMALLER_OK = 0x20, /**< Smaller-than-requested buffers OK */ 321 _DRM_DMA_LARGER_OK = 0x40 /**< Larger-than-requested buffers OK */ 322 }; 323 324 /* 325 * DRM_IOCTL_ADD_BUFS and DRM_IOCTL_MARK_BUFS ioctl argument type. 326 * 327 * \sa drmAddBufs(). 328 */ 329 struct drm_buf_desc { 330 int count; /**< Number of buffers of this size */ 331 int size; /**< Size in bytes */ 332 int low_mark; /**< Low water mark */ 333 int high_mark; /**< High water mark */ 334 enum { 335 _DRM_PAGE_ALIGN = 0x01, /**< Align on page boundaries for DMA */ 336 _DRM_AGP_BUFFER = 0x02, /**< Buffer is in AGP space */ 337 _DRM_SG_BUFFER = 0x04, /**< Scatter/gather memory buffer */ 338 _DRM_FB_BUFFER = 0x08, /**< Buffer is in frame buffer */ 339 _DRM_PCI_BUFFER_RO = 0x10 /**< Map PCI DMA buffer read-only */ 340 } flags; 341 unsigned long agp_start; /**< 342 * Start address of where the AGP buffers are 343 * in the AGP aperture 344 */ 345 }; 346 347 /* 348 * DRM_IOCTL_INFO_BUFS ioctl argument type. 349 */ 350 struct drm_buf_info { 351 int count; /**< Entries in list */ 352 struct drm_buf_desc *list; 353 }; 354 355 /* 356 * DRM_IOCTL_FREE_BUFS ioctl argument type. 357 */ 358 struct drm_buf_free { 359 int count; 360 int *list; 361 }; 362 363 /* 364 * Buffer information 365 * 366 * \sa drm_buf_map. 367 */ 368 struct drm_buf_pub { 369 int idx; /**< Index into the master buffer list */ 370 int total; /**< Buffer size */ 371 int used; /**< Amount of buffer in use (for DMA) */ 372 void *address; /**< Address of buffer */ 373 }; 374 375 /* 376 * DRM_IOCTL_MAP_BUFS ioctl argument type. 377 */ 378 struct drm_buf_map { 379 int count; /**< Length of the buffer list */ 380 #ifdef __cplusplus 381 void *virt; 382 #else 383 void *virtual; /**< Mmap'd area in user-virtual */ 384 #endif 385 struct drm_buf_pub *list; /**< Buffer information */ 386 }; 387 388 /* 389 * DRM_IOCTL_DMA ioctl argument type. 390 * 391 * Indices here refer to the offset into the buffer list in drm_buf_get. 392 * 393 * \sa drmDMA(). 394 */ 395 struct drm_dma { 396 int context; /**< Context handle */ 397 int send_count; /**< Number of buffers to send */ 398 int *send_indices; /**< List of handles to buffers */ 399 int *send_sizes; /**< Lengths of data to send */ 400 enum drm_dma_flags flags; /**< Flags */ 401 int request_count; /**< Number of buffers requested */ 402 int request_size; /**< Desired size for buffers */ 403 int *request_indices; /**< Buffer information */ 404 int *request_sizes; 405 int granted_count; /**< Number of buffers granted */ 406 }; 407 408 enum drm_ctx_flags { 409 _DRM_CONTEXT_PRESERVED = 0x01, 410 _DRM_CONTEXT_2DONLY = 0x02 411 }; 412 413 /* 414 * DRM_IOCTL_ADD_CTX ioctl argument type. 415 * 416 * \sa drmCreateContext() and drmDestroyContext(). 417 */ 418 struct drm_ctx { 419 drm_context_t handle; 420 enum drm_ctx_flags flags; 421 }; 422 423 /* 424 * DRM_IOCTL_RES_CTX ioctl argument type. 425 */ 426 struct drm_ctx_res { 427 int count; 428 struct drm_ctx *contexts; 429 }; 430 431 /* 432 * DRM_IOCTL_ADD_DRAW and DRM_IOCTL_RM_DRAW ioctl argument type. 433 */ 434 struct drm_draw { 435 drm_drawable_t handle; 436 }; 437 438 /* 439 * DRM_IOCTL_UPDATE_DRAW ioctl argument type. 440 */ 441 typedef enum { 442 DRM_DRAWABLE_CLIPRECTS 443 } drm_drawable_info_type_t; 444 445 struct drm_update_draw { 446 drm_drawable_t handle; 447 unsigned int type; 448 unsigned int num; 449 unsigned long long data; 450 }; 451 452 /* 453 * DRM_IOCTL_GET_MAGIC and DRM_IOCTL_AUTH_MAGIC ioctl argument type. 454 */ 455 struct drm_auth { 456 drm_magic_t magic; 457 }; 458 459 /* 460 * DRM_IOCTL_IRQ_BUSID ioctl argument type. 461 * 462 * \sa drmGetInterruptFromBusID(). 463 */ 464 struct drm_irq_busid { 465 int irq; /**< IRQ number */ 466 int busnum; /**< bus number */ 467 int devnum; /**< device number */ 468 int funcnum; /**< function number */ 469 }; 470 471 enum drm_vblank_seq_type { 472 _DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */ 473 _DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */ 474 /* bits 1-6 are reserved for high crtcs */ 475 _DRM_VBLANK_HIGH_CRTC_MASK = 0x0000003e, 476 _DRM_VBLANK_EVENT = 0x4000000, /**< Send event instead of blocking */ 477 _DRM_VBLANK_FLIP = 0x8000000, /**< Scheduled buffer swap should flip */ 478 _DRM_VBLANK_NEXTONMISS = 0x10000000, /**< If missed, wait for next vblank */ 479 _DRM_VBLANK_SECONDARY = 0x20000000, /**< Secondary display controller */ 480 _DRM_VBLANK_SIGNAL = 0x40000000 /**< Send signal instead of blocking, unsupported */ 481 }; 482 #define _DRM_VBLANK_HIGH_CRTC_SHIFT 1 483 484 #define _DRM_VBLANK_TYPES_MASK (_DRM_VBLANK_ABSOLUTE | _DRM_VBLANK_RELATIVE) 485 #define _DRM_VBLANK_FLAGS_MASK (_DRM_VBLANK_EVENT | _DRM_VBLANK_SIGNAL | \ 486 _DRM_VBLANK_SECONDARY | _DRM_VBLANK_NEXTONMISS) 487 488 struct drm_wait_vblank_request { 489 enum drm_vblank_seq_type type; 490 unsigned int sequence; 491 unsigned long signal; 492 }; 493 494 struct drm_wait_vblank_reply { 495 enum drm_vblank_seq_type type; 496 unsigned int sequence; 497 long tval_sec; 498 long tval_usec; 499 }; 500 501 /* 502 * DRM_IOCTL_WAIT_VBLANK ioctl argument type. 503 * 504 * \sa drmWaitVBlank(). 505 */ 506 union drm_wait_vblank { 507 struct drm_wait_vblank_request request; 508 struct drm_wait_vblank_reply reply; 509 }; 510 511 #define _DRM_PRE_MODESET 1 512 #define _DRM_POST_MODESET 2 513 514 /* 515 * DRM_IOCTL_MODESET_CTL ioctl argument type 516 * 517 * \sa drmModesetCtl(). 518 */ 519 struct drm_modeset_ctl { 520 __u32 crtc; 521 __u32 cmd; 522 }; 523 524 /* 525 * DRM_IOCTL_AGP_ENABLE ioctl argument type. 526 * 527 * \sa drmAgpEnable(). 528 */ 529 struct drm_agp_mode { 530 unsigned long mode; /**< AGP mode */ 531 }; 532 533 /* 534 * DRM_IOCTL_AGP_ALLOC and DRM_IOCTL_AGP_FREE ioctls argument type. 535 * 536 * \sa drmAgpAlloc() and drmAgpFree(). 537 */ 538 struct drm_agp_buffer { 539 unsigned long size; /**< In bytes -- will round to page boundary */ 540 unsigned long handle; /**< Used for binding / unbinding */ 541 unsigned long type; /**< Type of memory to allocate */ 542 unsigned long physical; /**< Physical used by i810 */ 543 }; 544 545 /* 546 * DRM_IOCTL_AGP_BIND and DRM_IOCTL_AGP_UNBIND ioctls argument type. 547 * 548 * \sa drmAgpBind() and drmAgpUnbind(). 549 */ 550 struct drm_agp_binding { 551 unsigned long handle; /**< From drm_agp_buffer */ 552 unsigned long offset; /**< In bytes -- will round to page boundary */ 553 }; 554 555 /* 556 * DRM_IOCTL_AGP_INFO ioctl argument type. 557 * 558 * \sa drmAgpVersionMajor(), drmAgpVersionMinor(), drmAgpGetMode(), 559 * drmAgpBase(), drmAgpSize(), drmAgpMemoryUsed(), drmAgpMemoryAvail(), 560 * drmAgpVendorId() and drmAgpDeviceId(). 561 */ 562 struct drm_agp_info { 563 int agp_version_major; 564 int agp_version_minor; 565 unsigned long mode; 566 unsigned long aperture_base; /* physical address */ 567 unsigned long aperture_size; /* bytes */ 568 unsigned long memory_allowed; /* bytes */ 569 unsigned long memory_used; 570 571 /* PCI information */ 572 unsigned short id_vendor; 573 unsigned short id_device; 574 }; 575 576 /* 577 * DRM_IOCTL_SG_ALLOC ioctl argument type. 578 */ 579 struct drm_scatter_gather { 580 unsigned long size; /**< In bytes -- will round to page boundary */ 581 unsigned long handle; /**< Used for mapping / unmapping */ 582 }; 583 584 /* 585 * DRM_IOCTL_SET_VERSION ioctl argument type. 586 */ 587 struct drm_set_version { 588 int drm_di_major; 589 int drm_di_minor; 590 int drm_dd_major; 591 int drm_dd_minor; 592 }; 593 594 /** 595 * struct drm_gem_close - Argument for &DRM_IOCTL_GEM_CLOSE ioctl. 596 * @handle: Handle of the object to be closed. 597 * @pad: Padding. 598 * 599 * Releases the handle to an mm object. 600 */ 601 struct drm_gem_close { 602 __u32 handle; 603 __u32 pad; 604 }; 605 606 /** 607 * struct drm_gem_flink - Argument for &DRM_IOCTL_GEM_FLINK ioctl. 608 * @handle: Handle for the object being named. 609 * @name: Returned global name. 610 * 611 * Create a global name for an object, returning the name. 612 * 613 * Note that the name does not hold a reference; when the object 614 * is freed, the name goes away. 615 */ 616 struct drm_gem_flink { 617 __u32 handle; 618 __u32 name; 619 }; 620 621 /** 622 * struct drm_gem_open - Argument for &DRM_IOCTL_GEM_OPEN ioctl. 623 * @name: Name of object being opened. 624 * @handle: Returned handle for the object. 625 * @size: Returned size of the object 626 * 627 * Open an object using the global name, returning a handle and the size. 628 * 629 * This handle (of course) holds a reference to the object, so the object 630 * will not go away until the handle is deleted. 631 */ 632 struct drm_gem_open { 633 __u32 name; 634 __u32 handle; 635 __u64 size; 636 }; 637 638 /** 639 * struct drm_gem_change_handle - Argument for &DRM_IOCTL_GEM_CHANGE_HANDLE ioctl. 640 * @handle: The handle of a gem object. 641 * @new_handle: An available gem handle. 642 * 643 * This ioctl changes the handle of a GEM object to the specified one. 644 * The new handle must be unused. On success the old handle is closed 645 * and all further IOCTL should refer to the new handle only. 646 * Calls to DRM_IOCTL_PRIME_FD_TO_HANDLE will return the new handle. 647 */ 648 struct drm_gem_change_handle { 649 __u32 handle; 650 __u32 new_handle; 651 }; 652 653 /** 654 * DRM_CAP_DUMB_BUFFER 655 * 656 * If set to 1, the driver supports creating dumb buffers via the 657 * &DRM_IOCTL_MODE_CREATE_DUMB ioctl. 658 */ 659 #define DRM_CAP_DUMB_BUFFER 0x1 660 /** 661 * DRM_CAP_VBLANK_HIGH_CRTC 662 * 663 * If set to 1, the kernel supports specifying a :ref:`CRTC index<crtc_index>` 664 * in the high bits of &drm_wait_vblank_request.type. 665 * 666 * Starting kernel version 2.6.39, this capability is always set to 1. 667 */ 668 #define DRM_CAP_VBLANK_HIGH_CRTC 0x2 669 /** 670 * DRM_CAP_DUMB_PREFERRED_DEPTH 671 * 672 * The preferred bit depth for dumb buffers. 673 * 674 * The bit depth is the number of bits used to indicate the color of a single 675 * pixel excluding any padding. This is different from the number of bits per 676 * pixel. For instance, XRGB8888 has a bit depth of 24 but has 32 bits per 677 * pixel. 678 * 679 * Note that this preference only applies to dumb buffers, it's irrelevant for 680 * other types of buffers. 681 */ 682 #define DRM_CAP_DUMB_PREFERRED_DEPTH 0x3 683 /** 684 * DRM_CAP_DUMB_PREFER_SHADOW 685 * 686 * If set to 1, the driver prefers userspace to render to a shadow buffer 687 * instead of directly rendering to a dumb buffer. For best speed, userspace 688 * should do streaming ordered memory copies into the dumb buffer and never 689 * read from it. 690 * 691 * Note that this preference only applies to dumb buffers, it's irrelevant for 692 * other types of buffers. 693 */ 694 #define DRM_CAP_DUMB_PREFER_SHADOW 0x4 695 /** 696 * DRM_CAP_PRIME 697 * 698 * Bitfield of supported PRIME sharing capabilities. See &DRM_PRIME_CAP_IMPORT 699 * and &DRM_PRIME_CAP_EXPORT. 700 * 701 * Starting from kernel version 6.6, both &DRM_PRIME_CAP_IMPORT and 702 * &DRM_PRIME_CAP_EXPORT are always advertised. 703 * 704 * PRIME buffers are exposed as dma-buf file descriptors. 705 * See :ref:`prime_buffer_sharing`. 706 */ 707 #define DRM_CAP_PRIME 0x5 708 /** 709 * DRM_PRIME_CAP_IMPORT 710 * 711 * If this bit is set in &DRM_CAP_PRIME, the driver supports importing PRIME 712 * buffers via the &DRM_IOCTL_PRIME_FD_TO_HANDLE ioctl. 713 * 714 * Starting from kernel version 6.6, this bit is always set in &DRM_CAP_PRIME. 715 */ 716 #define DRM_PRIME_CAP_IMPORT 0x1 717 /** 718 * DRM_PRIME_CAP_EXPORT 719 * 720 * If this bit is set in &DRM_CAP_PRIME, the driver supports exporting PRIME 721 * buffers via the &DRM_IOCTL_PRIME_HANDLE_TO_FD ioctl. 722 * 723 * Starting from kernel version 6.6, this bit is always set in &DRM_CAP_PRIME. 724 */ 725 #define DRM_PRIME_CAP_EXPORT 0x2 726 /** 727 * DRM_CAP_TIMESTAMP_MONOTONIC 728 * 729 * If set to 0, the kernel will report timestamps with ``CLOCK_REALTIME`` in 730 * struct drm_event_vblank. If set to 1, the kernel will report timestamps with 731 * ``CLOCK_MONOTONIC``. See ``clock_gettime(2)`` for the definition of these 732 * clocks. 733 * 734 * Starting from kernel version 2.6.39, the default value for this capability 735 * is 1. Starting kernel version 4.15, this capability is always set to 1. 736 */ 737 #define DRM_CAP_TIMESTAMP_MONOTONIC 0x6 738 /** 739 * DRM_CAP_ASYNC_PAGE_FLIP 740 * 741 * If set to 1, the driver supports &DRM_MODE_PAGE_FLIP_ASYNC for legacy 742 * page-flips. 743 */ 744 #define DRM_CAP_ASYNC_PAGE_FLIP 0x7 745 /** 746 * DRM_CAP_CURSOR_WIDTH 747 * 748 * The ``CURSOR_WIDTH`` and ``CURSOR_HEIGHT`` capabilities return a valid 749 * width x height combination for the hardware cursor. The intention is that a 750 * hardware agnostic userspace can query a cursor plane size to use. 751 * 752 * Note that the cross-driver contract is to merely return a valid size; 753 * drivers are free to attach another meaning on top, eg. i915 returns the 754 * maximum plane size. 755 */ 756 #define DRM_CAP_CURSOR_WIDTH 0x8 757 /** 758 * DRM_CAP_CURSOR_HEIGHT 759 * 760 * See &DRM_CAP_CURSOR_WIDTH. 761 */ 762 #define DRM_CAP_CURSOR_HEIGHT 0x9 763 /** 764 * DRM_CAP_ADDFB2_MODIFIERS 765 * 766 * If set to 1, the driver supports supplying modifiers in the 767 * &DRM_IOCTL_MODE_ADDFB2 ioctl. 768 */ 769 #define DRM_CAP_ADDFB2_MODIFIERS 0x10 770 /** 771 * DRM_CAP_PAGE_FLIP_TARGET 772 * 773 * If set to 1, the driver supports the &DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE and 774 * &DRM_MODE_PAGE_FLIP_TARGET_RELATIVE flags in 775 * &drm_mode_crtc_page_flip_target.flags for the &DRM_IOCTL_MODE_PAGE_FLIP 776 * ioctl. 777 */ 778 #define DRM_CAP_PAGE_FLIP_TARGET 0x11 779 /** 780 * DRM_CAP_CRTC_IN_VBLANK_EVENT 781 * 782 * If set to 1, the kernel supports reporting the CRTC ID in 783 * &drm_event_vblank.crtc_id for the &DRM_EVENT_VBLANK and 784 * &DRM_EVENT_FLIP_COMPLETE events. 785 * 786 * Starting kernel version 4.12, this capability is always set to 1. 787 */ 788 #define DRM_CAP_CRTC_IN_VBLANK_EVENT 0x12 789 /** 790 * DRM_CAP_SYNCOBJ 791 * 792 * If set to 1, the driver supports sync objects. See :ref:`drm_sync_objects`. 793 */ 794 #define DRM_CAP_SYNCOBJ 0x13 795 /** 796 * DRM_CAP_SYNCOBJ_TIMELINE 797 * 798 * If set to 1, the driver supports timeline operations on sync objects. See 799 * :ref:`drm_sync_objects`. 800 */ 801 #define DRM_CAP_SYNCOBJ_TIMELINE 0x14 802 /** 803 * DRM_CAP_ATOMIC_ASYNC_PAGE_FLIP 804 * 805 * If set to 1, the driver supports &DRM_MODE_PAGE_FLIP_ASYNC for atomic 806 * commits. 807 */ 808 #define DRM_CAP_ATOMIC_ASYNC_PAGE_FLIP 0x15 809 810 /* DRM_IOCTL_GET_CAP ioctl argument type */ 811 struct drm_get_cap { 812 __u64 capability; 813 __u64 value; 814 }; 815 816 /** 817 * DRM_CLIENT_CAP_STEREO_3D 818 * 819 * If set to 1, the DRM core will expose the stereo 3D capabilities of the 820 * monitor by advertising the supported 3D layouts in the flags of struct 821 * drm_mode_modeinfo. See ``DRM_MODE_FLAG_3D_*``. 822 * 823 * This capability is always supported for all drivers starting from kernel 824 * version 3.13. 825 */ 826 #define DRM_CLIENT_CAP_STEREO_3D 1 827 828 /** 829 * DRM_CLIENT_CAP_UNIVERSAL_PLANES 830 * 831 * If set to 1, the DRM core will expose all planes (overlay, primary, and 832 * cursor) to userspace. 833 * 834 * This capability has been introduced in kernel version 3.15. Starting from 835 * kernel version 3.17, this capability is always supported for all drivers. 836 */ 837 #define DRM_CLIENT_CAP_UNIVERSAL_PLANES 2 838 839 /** 840 * DRM_CLIENT_CAP_ATOMIC 841 * 842 * If set to 1, the DRM core will expose atomic properties to userspace. This 843 * implicitly enables &DRM_CLIENT_CAP_UNIVERSAL_PLANES and 844 * &DRM_CLIENT_CAP_ASPECT_RATIO. 845 * 846 * If the driver doesn't support atomic mode-setting, enabling this capability 847 * will fail with -EOPNOTSUPP. 848 * 849 * This capability has been introduced in kernel version 4.0. Starting from 850 * kernel version 4.2, this capability is always supported for atomic-capable 851 * drivers. 852 */ 853 #define DRM_CLIENT_CAP_ATOMIC 3 854 855 /** 856 * DRM_CLIENT_CAP_ASPECT_RATIO 857 * 858 * If set to 1, the DRM core will provide aspect ratio information in modes. 859 * See ``DRM_MODE_FLAG_PIC_AR_*``. 860 * 861 * This capability is always supported for all drivers starting from kernel 862 * version 4.18. 863 */ 864 #define DRM_CLIENT_CAP_ASPECT_RATIO 4 865 866 /** 867 * DRM_CLIENT_CAP_WRITEBACK_CONNECTORS 868 * 869 * If set to 1, the DRM core will expose special connectors to be used for 870 * writing back to memory the scene setup in the commit. The client must enable 871 * &DRM_CLIENT_CAP_ATOMIC first. 872 * 873 * This capability is always supported for atomic-capable drivers starting from 874 * kernel version 4.19. 875 */ 876 #define DRM_CLIENT_CAP_WRITEBACK_CONNECTORS 5 877 878 /** 879 * DRM_CLIENT_CAP_CURSOR_PLANE_HOTSPOT 880 * 881 * Drivers for para-virtualized hardware (e.g. vmwgfx, qxl, virtio and 882 * virtualbox) have additional restrictions for cursor planes (thus 883 * making cursor planes on those drivers not truly universal,) e.g. 884 * they need cursor planes to act like one would expect from a mouse 885 * cursor and have correctly set hotspot properties. 886 * If this client cap is not set the DRM core will hide cursor plane on 887 * those virtualized drivers because not setting it implies that the 888 * client is not capable of dealing with those extra restictions. 889 * Clients which do set cursor hotspot and treat the cursor plane 890 * like a mouse cursor should set this property. 891 * The client must enable &DRM_CLIENT_CAP_ATOMIC first. 892 * 893 * Setting this property on drivers which do not special case 894 * cursor planes (i.e. non-virtualized drivers) will return 895 * EOPNOTSUPP, which can be used by userspace to gauge 896 * requirements of the hardware/drivers they're running on. 897 * 898 * This capability is always supported for atomic-capable virtualized 899 * drivers starting from kernel version 6.6. 900 */ 901 #define DRM_CLIENT_CAP_CURSOR_PLANE_HOTSPOT 6 902 903 /** 904 * DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE 905 * 906 * If set to 1 the DRM core will allow setting the COLOR_PIPELINE 907 * property on a &drm_plane, as well as drm_colorop properties. 908 * 909 * Setting of these plane properties will be rejected when this client 910 * cap is set: 911 * - COLOR_ENCODING 912 * - COLOR_RANGE 913 * 914 * The client must enable &DRM_CLIENT_CAP_ATOMIC first. 915 */ 916 #define DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE 7 917 918 /* DRM_IOCTL_SET_CLIENT_CAP ioctl argument type */ 919 struct drm_set_client_cap { 920 __u64 capability; 921 __u64 value; 922 }; 923 924 #define DRM_RDWR O_RDWR 925 #define DRM_CLOEXEC O_CLOEXEC 926 struct drm_prime_handle { 927 __u32 handle; 928 929 /** Flags.. only applicable for handle->fd */ 930 __u32 flags; 931 932 /** Returned dmabuf file descriptor */ 933 __s32 fd; 934 }; 935 936 struct drm_syncobj_create { 937 __u32 handle; 938 #define DRM_SYNCOBJ_CREATE_SIGNALED (1 << 0) 939 __u32 flags; 940 }; 941 942 struct drm_syncobj_destroy { 943 __u32 handle; 944 __u32 pad; 945 }; 946 947 #define DRM_SYNCOBJ_FD_TO_HANDLE_FLAGS_IMPORT_SYNC_FILE (1 << 0) 948 #define DRM_SYNCOBJ_FD_TO_HANDLE_FLAGS_TIMELINE (1 << 1) 949 #define DRM_SYNCOBJ_HANDLE_TO_FD_FLAGS_EXPORT_SYNC_FILE (1 << 0) 950 #define DRM_SYNCOBJ_HANDLE_TO_FD_FLAGS_TIMELINE (1 << 1) 951 struct drm_syncobj_handle { 952 __u32 handle; 953 __u32 flags; 954 955 __s32 fd; 956 __u32 pad; 957 958 __u64 point; 959 }; 960 961 struct drm_syncobj_transfer { 962 __u32 src_handle; 963 __u32 dst_handle; 964 __u64 src_point; 965 __u64 dst_point; 966 __u32 flags; 967 __u32 pad; 968 }; 969 970 #define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL (1 << 0) 971 #define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT (1 << 1) 972 #define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_AVAILABLE (1 << 2) /* wait for time point to become available */ 973 #define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_DEADLINE (1 << 3) /* set fence deadline to deadline_nsec */ 974 struct drm_syncobj_wait { 975 __u64 handles; 976 /* absolute timeout */ 977 __s64 timeout_nsec; 978 __u32 count_handles; 979 __u32 flags; 980 __u32 first_signaled; /* only valid when not waiting all */ 981 __u32 pad; 982 /** 983 * @deadline_nsec - fence deadline hint 984 * 985 * Deadline hint, in absolute CLOCK_MONOTONIC, to set on backing 986 * fence(s) if the DRM_SYNCOBJ_WAIT_FLAGS_WAIT_DEADLINE flag is 987 * set. 988 */ 989 __u64 deadline_nsec; 990 }; 991 992 struct drm_syncobj_timeline_wait { 993 __u64 handles; 994 /* wait on specific timeline point for every handles*/ 995 __u64 points; 996 /* absolute timeout */ 997 __s64 timeout_nsec; 998 __u32 count_handles; 999 __u32 flags; 1000 __u32 first_signaled; /* only valid when not waiting all */ 1001 __u32 pad; 1002 /** 1003 * @deadline_nsec - fence deadline hint 1004 * 1005 * Deadline hint, in absolute CLOCK_MONOTONIC, to set on backing 1006 * fence(s) if the DRM_SYNCOBJ_WAIT_FLAGS_WAIT_DEADLINE flag is 1007 * set. 1008 */ 1009 __u64 deadline_nsec; 1010 }; 1011 1012 /** 1013 * struct drm_syncobj_eventfd 1014 * @handle: syncobj handle. 1015 * @flags: Zero to wait for the point to be signalled, or 1016 * &DRM_SYNCOBJ_WAIT_FLAGS_WAIT_AVAILABLE to wait for a fence to be 1017 * available for the point. 1018 * @point: syncobj timeline point (set to zero for binary syncobjs). 1019 * @fd: Existing eventfd to sent events to. 1020 * @pad: Must be zero. 1021 * 1022 * Register an eventfd to be signalled by a syncobj. The eventfd counter will 1023 * be incremented by one. 1024 */ 1025 struct drm_syncobj_eventfd { 1026 __u32 handle; 1027 __u32 flags; 1028 __u64 point; 1029 __s32 fd; 1030 __u32 pad; 1031 }; 1032 1033 1034 struct drm_syncobj_array { 1035 __u64 handles; 1036 __u32 count_handles; 1037 __u32 pad; 1038 }; 1039 1040 #define DRM_SYNCOBJ_QUERY_FLAGS_LAST_SUBMITTED (1 << 0) /* last available point on timeline syncobj */ 1041 struct drm_syncobj_timeline_array { 1042 __u64 handles; 1043 __u64 points; 1044 __u32 count_handles; 1045 __u32 flags; 1046 }; 1047 1048 1049 /* Query current scanout sequence number */ 1050 struct drm_crtc_get_sequence { 1051 __u32 crtc_id; /* requested crtc_id */ 1052 __u32 active; /* return: crtc output is active */ 1053 __u64 sequence; /* return: most recent vblank sequence */ 1054 __s64 sequence_ns; /* return: most recent time of first pixel out */ 1055 }; 1056 1057 /* Queue event to be delivered at specified sequence. Time stamp marks 1058 * when the first pixel of the refresh cycle leaves the display engine 1059 * for the display 1060 */ 1061 #define DRM_CRTC_SEQUENCE_RELATIVE 0x00000001 /* sequence is relative to current */ 1062 #define DRM_CRTC_SEQUENCE_NEXT_ON_MISS 0x00000002 /* Use next sequence if we've missed */ 1063 1064 struct drm_crtc_queue_sequence { 1065 __u32 crtc_id; 1066 __u32 flags; 1067 __u64 sequence; /* on input, target sequence. on output, actual sequence */ 1068 __u64 user_data; /* user data passed to event */ 1069 }; 1070 1071 #define DRM_CLIENT_NAME_MAX_LEN 64 1072 struct drm_set_client_name { 1073 __u64 name_len; 1074 __u64 name; 1075 }; 1076 1077 1078 #if defined(__cplusplus) 1079 } 1080 #endif 1081 1082 #include "drm_mode.h" 1083 1084 #if defined(__cplusplus) 1085 extern "C" { 1086 #endif 1087 1088 #define DRM_IOCTL_BASE 'd' 1089 #define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr) 1090 #define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE,nr,type) 1091 #define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE,nr,type) 1092 #define DRM_IOWR(nr,type) _IOWR(DRM_IOCTL_BASE,nr,type) 1093 1094 #define DRM_IOCTL_VERSION DRM_IOWR(0x00, struct drm_version) 1095 #define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, struct drm_unique) 1096 #define DRM_IOCTL_GET_MAGIC DRM_IOR( 0x02, struct drm_auth) 1097 #define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, struct drm_irq_busid) 1098 #define DRM_IOCTL_GET_MAP DRM_IOWR(0x04, struct drm_map) 1099 #define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, struct drm_client) 1100 #define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, struct drm_stats) 1101 #define DRM_IOCTL_SET_VERSION DRM_IOWR(0x07, struct drm_set_version) 1102 #define DRM_IOCTL_MODESET_CTL DRM_IOW(0x08, struct drm_modeset_ctl) 1103 /** 1104 * DRM_IOCTL_GEM_CLOSE - Close a GEM handle. 1105 * 1106 * GEM handles are not reference-counted by the kernel. User-space is 1107 * responsible for managing their lifetime. For example, if user-space imports 1108 * the same memory object twice on the same DRM file description, the same GEM 1109 * handle is returned by both imports, and user-space needs to ensure 1110 * &DRM_IOCTL_GEM_CLOSE is performed once only. The same situation can happen 1111 * when a memory object is allocated, then exported and imported again on the 1112 * same DRM file description. The &DRM_IOCTL_MODE_GETFB2 IOCTL is an exception 1113 * and always returns fresh new GEM handles even if an existing GEM handle 1114 * already refers to the same memory object before the IOCTL is performed. 1115 */ 1116 #define DRM_IOCTL_GEM_CLOSE DRM_IOW (0x09, struct drm_gem_close) 1117 #define DRM_IOCTL_GEM_FLINK DRM_IOWR(0x0a, struct drm_gem_flink) 1118 #define DRM_IOCTL_GEM_OPEN DRM_IOWR(0x0b, struct drm_gem_open) 1119 #define DRM_IOCTL_GET_CAP DRM_IOWR(0x0c, struct drm_get_cap) 1120 #define DRM_IOCTL_SET_CLIENT_CAP DRM_IOW( 0x0d, struct drm_set_client_cap) 1121 1122 #define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, struct drm_unique) 1123 #define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, struct drm_auth) 1124 #define DRM_IOCTL_BLOCK DRM_IOWR(0x12, struct drm_block) 1125 #define DRM_IOCTL_UNBLOCK DRM_IOWR(0x13, struct drm_block) 1126 #define DRM_IOCTL_CONTROL DRM_IOW( 0x14, struct drm_control) 1127 #define DRM_IOCTL_ADD_MAP DRM_IOWR(0x15, struct drm_map) 1128 #define DRM_IOCTL_ADD_BUFS DRM_IOWR(0x16, struct drm_buf_desc) 1129 #define DRM_IOCTL_MARK_BUFS DRM_IOW( 0x17, struct drm_buf_desc) 1130 #define DRM_IOCTL_INFO_BUFS DRM_IOWR(0x18, struct drm_buf_info) 1131 #define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, struct drm_buf_map) 1132 #define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, struct drm_buf_free) 1133 1134 #define DRM_IOCTL_RM_MAP DRM_IOW( 0x1b, struct drm_map) 1135 1136 #define DRM_IOCTL_SET_SAREA_CTX DRM_IOW( 0x1c, struct drm_ctx_priv_map) 1137 #define DRM_IOCTL_GET_SAREA_CTX DRM_IOWR(0x1d, struct drm_ctx_priv_map) 1138 1139 #define DRM_IOCTL_SET_MASTER DRM_IO(0x1e) 1140 #define DRM_IOCTL_DROP_MASTER DRM_IO(0x1f) 1141 1142 #define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, struct drm_ctx) 1143 #define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, struct drm_ctx) 1144 #define DRM_IOCTL_MOD_CTX DRM_IOW( 0x22, struct drm_ctx) 1145 #define DRM_IOCTL_GET_CTX DRM_IOWR(0x23, struct drm_ctx) 1146 #define DRM_IOCTL_SWITCH_CTX DRM_IOW( 0x24, struct drm_ctx) 1147 #define DRM_IOCTL_NEW_CTX DRM_IOW( 0x25, struct drm_ctx) 1148 #define DRM_IOCTL_RES_CTX DRM_IOWR(0x26, struct drm_ctx_res) 1149 #define DRM_IOCTL_ADD_DRAW DRM_IOWR(0x27, struct drm_draw) 1150 #define DRM_IOCTL_RM_DRAW DRM_IOWR(0x28, struct drm_draw) 1151 #define DRM_IOCTL_DMA DRM_IOWR(0x29, struct drm_dma) 1152 #define DRM_IOCTL_LOCK DRM_IOW( 0x2a, struct drm_lock) 1153 #define DRM_IOCTL_UNLOCK DRM_IOW( 0x2b, struct drm_lock) 1154 #define DRM_IOCTL_FINISH DRM_IOW( 0x2c, struct drm_lock) 1155 1156 /** 1157 * DRM_IOCTL_PRIME_HANDLE_TO_FD - Convert a GEM handle to a DMA-BUF FD. 1158 * 1159 * User-space sets &drm_prime_handle.handle with the GEM handle to export and 1160 * &drm_prime_handle.flags, and gets back a DMA-BUF file descriptor in 1161 * &drm_prime_handle.fd. 1162 * 1163 * The export can fail for any driver-specific reason, e.g. because export is 1164 * not supported for this specific GEM handle (but might be for others). 1165 * 1166 * Support for exporting DMA-BUFs is advertised via &DRM_PRIME_CAP_EXPORT. 1167 */ 1168 #define DRM_IOCTL_PRIME_HANDLE_TO_FD DRM_IOWR(0x2d, struct drm_prime_handle) 1169 /** 1170 * DRM_IOCTL_PRIME_FD_TO_HANDLE - Convert a DMA-BUF FD to a GEM handle. 1171 * 1172 * User-space sets &drm_prime_handle.fd with a DMA-BUF file descriptor to 1173 * import, and gets back a GEM handle in &drm_prime_handle.handle. 1174 * &drm_prime_handle.flags is unused. 1175 * 1176 * If an existing GEM handle refers to the memory object backing the DMA-BUF, 1177 * that GEM handle is returned. Therefore user-space which needs to handle 1178 * arbitrary DMA-BUFs must have a user-space lookup data structure to manually 1179 * reference-count duplicated GEM handles. For more information see 1180 * &DRM_IOCTL_GEM_CLOSE. 1181 * 1182 * The import can fail for any driver-specific reason, e.g. because import is 1183 * only supported for DMA-BUFs allocated on this DRM device. 1184 * 1185 * Support for importing DMA-BUFs is advertised via &DRM_PRIME_CAP_IMPORT. 1186 */ 1187 #define DRM_IOCTL_PRIME_FD_TO_HANDLE DRM_IOWR(0x2e, struct drm_prime_handle) 1188 1189 #define DRM_IOCTL_AGP_ACQUIRE DRM_IO( 0x30) 1190 #define DRM_IOCTL_AGP_RELEASE DRM_IO( 0x31) 1191 #define DRM_IOCTL_AGP_ENABLE DRM_IOW( 0x32, struct drm_agp_mode) 1192 #define DRM_IOCTL_AGP_INFO DRM_IOR( 0x33, struct drm_agp_info) 1193 #define DRM_IOCTL_AGP_ALLOC DRM_IOWR(0x34, struct drm_agp_buffer) 1194 #define DRM_IOCTL_AGP_FREE DRM_IOW( 0x35, struct drm_agp_buffer) 1195 #define DRM_IOCTL_AGP_BIND DRM_IOW( 0x36, struct drm_agp_binding) 1196 #define DRM_IOCTL_AGP_UNBIND DRM_IOW( 0x37, struct drm_agp_binding) 1197 1198 #define DRM_IOCTL_SG_ALLOC DRM_IOWR(0x38, struct drm_scatter_gather) 1199 #define DRM_IOCTL_SG_FREE DRM_IOW( 0x39, struct drm_scatter_gather) 1200 1201 #define DRM_IOCTL_WAIT_VBLANK DRM_IOWR(0x3a, union drm_wait_vblank) 1202 1203 #define DRM_IOCTL_CRTC_GET_SEQUENCE DRM_IOWR(0x3b, struct drm_crtc_get_sequence) 1204 #define DRM_IOCTL_CRTC_QUEUE_SEQUENCE DRM_IOWR(0x3c, struct drm_crtc_queue_sequence) 1205 1206 #define DRM_IOCTL_UPDATE_DRAW DRM_IOW(0x3f, struct drm_update_draw) 1207 1208 #define DRM_IOCTL_MODE_GETRESOURCES DRM_IOWR(0xA0, struct drm_mode_card_res) 1209 #define DRM_IOCTL_MODE_GETCRTC DRM_IOWR(0xA1, struct drm_mode_crtc) 1210 #define DRM_IOCTL_MODE_SETCRTC DRM_IOWR(0xA2, struct drm_mode_crtc) 1211 #define DRM_IOCTL_MODE_CURSOR DRM_IOWR(0xA3, struct drm_mode_cursor) 1212 #define DRM_IOCTL_MODE_GETGAMMA DRM_IOWR(0xA4, struct drm_mode_crtc_lut) 1213 #define DRM_IOCTL_MODE_SETGAMMA DRM_IOWR(0xA5, struct drm_mode_crtc_lut) 1214 #define DRM_IOCTL_MODE_GETENCODER DRM_IOWR(0xA6, struct drm_mode_get_encoder) 1215 #define DRM_IOCTL_MODE_GETCONNECTOR DRM_IOWR(0xA7, struct drm_mode_get_connector) 1216 #define DRM_IOCTL_MODE_ATTACHMODE DRM_IOWR(0xA8, struct drm_mode_mode_cmd) /* deprecated (never worked) */ 1217 #define DRM_IOCTL_MODE_DETACHMODE DRM_IOWR(0xA9, struct drm_mode_mode_cmd) /* deprecated (never worked) */ 1218 1219 #define DRM_IOCTL_MODE_GETPROPERTY DRM_IOWR(0xAA, struct drm_mode_get_property) 1220 #define DRM_IOCTL_MODE_SETPROPERTY DRM_IOWR(0xAB, struct drm_mode_connector_set_property) 1221 #define DRM_IOCTL_MODE_GETPROPBLOB DRM_IOWR(0xAC, struct drm_mode_get_blob) 1222 #define DRM_IOCTL_MODE_GETFB DRM_IOWR(0xAD, struct drm_mode_fb_cmd) 1223 #define DRM_IOCTL_MODE_ADDFB DRM_IOWR(0xAE, struct drm_mode_fb_cmd) 1224 /** 1225 * DRM_IOCTL_MODE_RMFB - Remove a framebuffer. 1226 * 1227 * This removes a framebuffer previously added via ADDFB/ADDFB2. The IOCTL 1228 * argument is a framebuffer object ID. 1229 * 1230 * Warning: removing a framebuffer currently in-use on an enabled plane will 1231 * disable that plane. The CRTC the plane is linked to may also be disabled 1232 * (depending on driver capabilities). 1233 */ 1234 #define DRM_IOCTL_MODE_RMFB DRM_IOWR(0xAF, unsigned int) 1235 #define DRM_IOCTL_MODE_PAGE_FLIP DRM_IOWR(0xB0, struct drm_mode_crtc_page_flip) 1236 #define DRM_IOCTL_MODE_DIRTYFB DRM_IOWR(0xB1, struct drm_mode_fb_dirty_cmd) 1237 1238 /** 1239 * DRM_IOCTL_MODE_CREATE_DUMB - Create a new dumb buffer object. 1240 * 1241 * KMS dumb buffers provide a very primitive way to allocate a buffer object 1242 * suitable for scanout and map it for software rendering. KMS dumb buffers are 1243 * not suitable for hardware-accelerated rendering nor video decoding. KMS dumb 1244 * buffers are not suitable to be displayed on any other device than the KMS 1245 * device where they were allocated from. Also see 1246 * :ref:`kms_dumb_buffer_objects`. 1247 * 1248 * The IOCTL argument is a struct drm_mode_create_dumb. 1249 * 1250 * User-space is expected to create a KMS dumb buffer via this IOCTL, then add 1251 * it as a KMS framebuffer via &DRM_IOCTL_MODE_ADDFB and map it via 1252 * &DRM_IOCTL_MODE_MAP_DUMB. 1253 * 1254 * &DRM_CAP_DUMB_BUFFER indicates whether this IOCTL is supported. 1255 * &DRM_CAP_DUMB_PREFERRED_DEPTH and &DRM_CAP_DUMB_PREFER_SHADOW indicate 1256 * driver preferences for dumb buffers. 1257 */ 1258 #define DRM_IOCTL_MODE_CREATE_DUMB DRM_IOWR(0xB2, struct drm_mode_create_dumb) 1259 #define DRM_IOCTL_MODE_MAP_DUMB DRM_IOWR(0xB3, struct drm_mode_map_dumb) 1260 #define DRM_IOCTL_MODE_DESTROY_DUMB DRM_IOWR(0xB4, struct drm_mode_destroy_dumb) 1261 #define DRM_IOCTL_MODE_GETPLANERESOURCES DRM_IOWR(0xB5, struct drm_mode_get_plane_res) 1262 #define DRM_IOCTL_MODE_GETPLANE DRM_IOWR(0xB6, struct drm_mode_get_plane) 1263 #define DRM_IOCTL_MODE_SETPLANE DRM_IOWR(0xB7, struct drm_mode_set_plane) 1264 #define DRM_IOCTL_MODE_ADDFB2 DRM_IOWR(0xB8, struct drm_mode_fb_cmd2) 1265 #define DRM_IOCTL_MODE_OBJ_GETPROPERTIES DRM_IOWR(0xB9, struct drm_mode_obj_get_properties) 1266 #define DRM_IOCTL_MODE_OBJ_SETPROPERTY DRM_IOWR(0xBA, struct drm_mode_obj_set_property) 1267 #define DRM_IOCTL_MODE_CURSOR2 DRM_IOWR(0xBB, struct drm_mode_cursor2) 1268 #define DRM_IOCTL_MODE_ATOMIC DRM_IOWR(0xBC, struct drm_mode_atomic) 1269 #define DRM_IOCTL_MODE_CREATEPROPBLOB DRM_IOWR(0xBD, struct drm_mode_create_blob) 1270 #define DRM_IOCTL_MODE_DESTROYPROPBLOB DRM_IOWR(0xBE, struct drm_mode_destroy_blob) 1271 1272 #define DRM_IOCTL_SYNCOBJ_CREATE DRM_IOWR(0xBF, struct drm_syncobj_create) 1273 #define DRM_IOCTL_SYNCOBJ_DESTROY DRM_IOWR(0xC0, struct drm_syncobj_destroy) 1274 #define DRM_IOCTL_SYNCOBJ_HANDLE_TO_FD DRM_IOWR(0xC1, struct drm_syncobj_handle) 1275 #define DRM_IOCTL_SYNCOBJ_FD_TO_HANDLE DRM_IOWR(0xC2, struct drm_syncobj_handle) 1276 #define DRM_IOCTL_SYNCOBJ_WAIT DRM_IOWR(0xC3, struct drm_syncobj_wait) 1277 #define DRM_IOCTL_SYNCOBJ_RESET DRM_IOWR(0xC4, struct drm_syncobj_array) 1278 #define DRM_IOCTL_SYNCOBJ_SIGNAL DRM_IOWR(0xC5, struct drm_syncobj_array) 1279 1280 #define DRM_IOCTL_MODE_CREATE_LEASE DRM_IOWR(0xC6, struct drm_mode_create_lease) 1281 #define DRM_IOCTL_MODE_LIST_LESSEES DRM_IOWR(0xC7, struct drm_mode_list_lessees) 1282 #define DRM_IOCTL_MODE_GET_LEASE DRM_IOWR(0xC8, struct drm_mode_get_lease) 1283 #define DRM_IOCTL_MODE_REVOKE_LEASE DRM_IOWR(0xC9, struct drm_mode_revoke_lease) 1284 1285 #define DRM_IOCTL_SYNCOBJ_TIMELINE_WAIT DRM_IOWR(0xCA, struct drm_syncobj_timeline_wait) 1286 #define DRM_IOCTL_SYNCOBJ_QUERY DRM_IOWR(0xCB, struct drm_syncobj_timeline_array) 1287 #define DRM_IOCTL_SYNCOBJ_TRANSFER DRM_IOWR(0xCC, struct drm_syncobj_transfer) 1288 #define DRM_IOCTL_SYNCOBJ_TIMELINE_SIGNAL DRM_IOWR(0xCD, struct drm_syncobj_timeline_array) 1289 1290 /** 1291 * DRM_IOCTL_MODE_GETFB2 - Get framebuffer metadata. 1292 * 1293 * This queries metadata about a framebuffer. User-space fills 1294 * &drm_mode_fb_cmd2.fb_id as the input, and the kernels fills the rest of the 1295 * struct as the output. 1296 * 1297 * If the client is DRM master or has &CAP_SYS_ADMIN, &drm_mode_fb_cmd2.handles 1298 * will be filled with GEM buffer handles. Fresh new GEM handles are always 1299 * returned, even if another GEM handle referring to the same memory object 1300 * already exists on the DRM file description. The caller is responsible for 1301 * removing the new handles, e.g. via the &DRM_IOCTL_GEM_CLOSE IOCTL. The same 1302 * new handle will be returned for multiple planes in case they use the same 1303 * memory object. Planes are valid until one has a zero handle -- this can be 1304 * used to compute the number of planes. 1305 * 1306 * Otherwise, &drm_mode_fb_cmd2.handles will be zeroed and planes are valid 1307 * until one has a zero &drm_mode_fb_cmd2.pitches. 1308 * 1309 * If the framebuffer has a format modifier, &DRM_MODE_FB_MODIFIERS will be set 1310 * in &drm_mode_fb_cmd2.flags and &drm_mode_fb_cmd2.modifier will contain the 1311 * modifier. Otherwise, user-space must ignore &drm_mode_fb_cmd2.modifier. 1312 * 1313 * To obtain DMA-BUF FDs for each plane without leaking GEM handles, user-space 1314 * can export each handle via &DRM_IOCTL_PRIME_HANDLE_TO_FD, then immediately 1315 * close each unique handle via &DRM_IOCTL_GEM_CLOSE, making sure to not 1316 * double-close handles which are specified multiple times in the array. 1317 */ 1318 #define DRM_IOCTL_MODE_GETFB2 DRM_IOWR(0xCE, struct drm_mode_fb_cmd2) 1319 1320 #define DRM_IOCTL_SYNCOBJ_EVENTFD DRM_IOWR(0xCF, struct drm_syncobj_eventfd) 1321 1322 /** 1323 * DRM_IOCTL_MODE_CLOSEFB - Close a framebuffer. 1324 * 1325 * This closes a framebuffer previously added via ADDFB/ADDFB2. The IOCTL 1326 * argument is a framebuffer object ID. 1327 * 1328 * This IOCTL is similar to &DRM_IOCTL_MODE_RMFB, except it doesn't disable 1329 * planes and CRTCs. As long as the framebuffer is used by a plane, it's kept 1330 * alive. When the plane no longer uses the framebuffer (because the 1331 * framebuffer is replaced with another one, or the plane is disabled), the 1332 * framebuffer is cleaned up. 1333 * 1334 * This is useful to implement flicker-free transitions between two processes. 1335 * 1336 * Depending on the threat model, user-space may want to ensure that the 1337 * framebuffer doesn't expose any sensitive user information: closed 1338 * framebuffers attached to a plane can be read back by the next DRM master. 1339 */ 1340 #define DRM_IOCTL_MODE_CLOSEFB DRM_IOWR(0xD0, struct drm_mode_closefb) 1341 1342 /** 1343 * DRM_IOCTL_SET_CLIENT_NAME - Attach a name to a drm_file 1344 * 1345 * Having a name allows for easier tracking and debugging. 1346 * The length of the name (without null ending char) must be 1347 * <= DRM_CLIENT_NAME_MAX_LEN. 1348 * The call will fail if the name contains whitespaces or non-printable chars. 1349 */ 1350 #define DRM_IOCTL_SET_CLIENT_NAME DRM_IOWR(0xD1, struct drm_set_client_name) 1351 1352 /** 1353 * DRM_IOCTL_GEM_CHANGE_HANDLE - Move an object to a different handle 1354 * 1355 * Some applications (notably CRIU) need objects to have specific gem handles. 1356 * This ioctl changes the object at one gem handle to use a new gem handle. 1357 */ 1358 #define DRM_IOCTL_GEM_CHANGE_HANDLE DRM_IOWR(0xD2, struct drm_gem_change_handle) 1359 1360 /* 1361 * Device specific ioctls should only be in their respective headers 1362 * The device specific ioctl range is from 0x40 to 0x9f. 1363 * Generic IOCTLS restart at 0xA0. 1364 * 1365 * \sa drmCommandNone(), drmCommandRead(), drmCommandWrite(), and 1366 * drmCommandReadWrite(). 1367 */ 1368 #define DRM_COMMAND_BASE 0x40 1369 #define DRM_COMMAND_END 0xA0 1370 1371 /** 1372 * struct drm_event - Header for DRM events 1373 * @type: event type. 1374 * @length: total number of payload bytes (including header). 1375 * 1376 * This struct is a header for events written back to user-space on the DRM FD. 1377 * A read on the DRM FD will always only return complete events: e.g. if the 1378 * read buffer is 100 bytes large and there are two 64 byte events pending, 1379 * only one will be returned. 1380 * 1381 * Event types 0 - 0x7fffffff are generic DRM events, 0x80000000 and 1382 * up are chipset specific. Generic DRM events include &DRM_EVENT_VBLANK, 1383 * &DRM_EVENT_FLIP_COMPLETE and &DRM_EVENT_CRTC_SEQUENCE. 1384 */ 1385 struct drm_event { 1386 __u32 type; 1387 __u32 length; 1388 }; 1389 1390 /** 1391 * DRM_EVENT_VBLANK - vertical blanking event 1392 * 1393 * This event is sent in response to &DRM_IOCTL_WAIT_VBLANK with the 1394 * &_DRM_VBLANK_EVENT flag set. 1395 * 1396 * The event payload is a struct drm_event_vblank. 1397 */ 1398 #define DRM_EVENT_VBLANK 0x01 1399 /** 1400 * DRM_EVENT_FLIP_COMPLETE - page-flip completion event 1401 * 1402 * This event is sent in response to an atomic commit or legacy page-flip with 1403 * the &DRM_MODE_PAGE_FLIP_EVENT flag set. 1404 * 1405 * The event payload is a struct drm_event_vblank. 1406 */ 1407 #define DRM_EVENT_FLIP_COMPLETE 0x02 1408 /** 1409 * DRM_EVENT_CRTC_SEQUENCE - CRTC sequence event 1410 * 1411 * This event is sent in response to &DRM_IOCTL_CRTC_QUEUE_SEQUENCE. 1412 * 1413 * The event payload is a struct drm_event_crtc_sequence. 1414 */ 1415 #define DRM_EVENT_CRTC_SEQUENCE 0x03 1416 1417 struct drm_event_vblank { 1418 struct drm_event base; 1419 __u64 user_data; 1420 __u32 tv_sec; 1421 __u32 tv_usec; 1422 __u32 sequence; 1423 __u32 crtc_id; /* 0 on older kernels that do not support this */ 1424 }; 1425 1426 /* Event delivered at sequence. Time stamp marks when the first pixel 1427 * of the refresh cycle leaves the display engine for the display 1428 */ 1429 struct drm_event_crtc_sequence { 1430 struct drm_event base; 1431 __u64 user_data; 1432 __s64 time_ns; 1433 __u64 sequence; 1434 }; 1435 1436 /* typedef area */ 1437 typedef struct drm_clip_rect drm_clip_rect_t; 1438 typedef struct drm_drawable_info drm_drawable_info_t; 1439 typedef struct drm_tex_region drm_tex_region_t; 1440 typedef struct drm_hw_lock drm_hw_lock_t; 1441 typedef struct drm_version drm_version_t; 1442 typedef struct drm_unique drm_unique_t; 1443 typedef struct drm_list drm_list_t; 1444 typedef struct drm_block drm_block_t; 1445 typedef struct drm_control drm_control_t; 1446 typedef enum drm_map_type drm_map_type_t; 1447 typedef enum drm_map_flags drm_map_flags_t; 1448 typedef struct drm_ctx_priv_map drm_ctx_priv_map_t; 1449 typedef struct drm_map drm_map_t; 1450 typedef struct drm_client drm_client_t; 1451 typedef enum drm_stat_type drm_stat_type_t; 1452 typedef struct drm_stats drm_stats_t; 1453 typedef enum drm_lock_flags drm_lock_flags_t; 1454 typedef struct drm_lock drm_lock_t; 1455 typedef enum drm_dma_flags drm_dma_flags_t; 1456 typedef struct drm_buf_desc drm_buf_desc_t; 1457 typedef struct drm_buf_info drm_buf_info_t; 1458 typedef struct drm_buf_free drm_buf_free_t; 1459 typedef struct drm_buf_pub drm_buf_pub_t; 1460 typedef struct drm_buf_map drm_buf_map_t; 1461 typedef struct drm_dma drm_dma_t; 1462 typedef union drm_wait_vblank drm_wait_vblank_t; 1463 typedef struct drm_agp_mode drm_agp_mode_t; 1464 typedef enum drm_ctx_flags drm_ctx_flags_t; 1465 typedef struct drm_ctx drm_ctx_t; 1466 typedef struct drm_ctx_res drm_ctx_res_t; 1467 typedef struct drm_draw drm_draw_t; 1468 typedef struct drm_update_draw drm_update_draw_t; 1469 typedef struct drm_auth drm_auth_t; 1470 typedef struct drm_irq_busid drm_irq_busid_t; 1471 typedef enum drm_vblank_seq_type drm_vblank_seq_type_t; 1472 1473 typedef struct drm_agp_buffer drm_agp_buffer_t; 1474 typedef struct drm_agp_binding drm_agp_binding_t; 1475 typedef struct drm_agp_info drm_agp_info_t; 1476 typedef struct drm_scatter_gather drm_scatter_gather_t; 1477 typedef struct drm_set_version drm_set_version_t; 1478 1479 #if defined(__cplusplus) 1480 } 1481 #endif 1482 1483 #endif
